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1 lt6301 sn6301 6301f dual 500ma, differential xdsl line driver in 28-lead tssop package n drives two lines from one package n exceeds all requirements for full rate, downstream adsl line drivers n power enhanced 28-lead tssop package n power saving adjustable supply current n 500ma minimum i out n 11.1v output swing, v s = 12v, r l = 100 w n 10.9v output swing, v s = 12v, i l = 250ma n low distortion: C 82dbc at 1mhz, 2v p-p into 50 w n 200mhz gain bandwidth n 600v/ m s slew rate n specified at 12v and 5v n high density adsl central office line drivers n high efficiency adsl, hdsl2, shdsl line drivers n buffers n test equipment amplifiers n cable drivers the lt ? 6301 is a 500ma minimum output current, quad op amp with outstanding distortion performance. the amplifiers are gain-of-ten stable, but can be easily com- pensated for lower gains. the extended output swing al- lows for lower supply rails to reduce system power. supply current is set with an external resistor to optimize power dissipation. the lt6301 features balanced, high imped- ance inputs with low input bias current and input offset voltage. active termination is easily implemented for fur- ther system power reduction. short-circuit protection and thermal shutdown ensure the devices ruggedness. the outputs drive a 100 w load to 11.1v with 12v supplies, and 10.9v with a 250ma load. the lt6301 is a functional replacement for the LT1739 and lt1794 in xdsl line driver applications and requires no circuit changes. the lt6301 is available in the very small, thermally enhanced, 28-lead tssop package for maximum port density in line driver applications. , ltc and lt are registered trademarks of linear technology corporation. high efficiency 12v supply adsl line driver 6301 ta01 + 1/4 lt6301 ?n + 1/4 lt6301 +in 12v shdn 12v 12.7 24.9k 1:2* 110 1000pf 110 1k 1k 12.7 shdnref 100 *coilcraft x8390-a or equivalent i supply = 10ma per amplifier with r shdn = 24.9k two complete adsl line drivers provided with one lt6301 package applicatio s u descriptio u features typical applicatio u
2 lt6301 sn6301 6301f order part number supply voltage (v + to v e ) ................................. 13.5v input current ..................................................... 10ma output short-circuit duration (note 2) ........... indefinite operating temperature range ............... e 40 c to 85 c specified temperature range (note 3) .. e 40 c to 85 c junction temperature .......................................... 150 c storage temperature range ................. e 65 c to 150 c lead temperature (soldering, 10 sec).................. 300 c lt6301cfe lt6301ife absolute axi u rati gs w ww u package/order i for atio w u u (note 1) t jmax = 150 c, q ja = 25 c/w (note 4) underside metal connected to v e electrical characteristics the l denotes the specifications which apply over the full specified temperature range, otherwise specifications are at t a = 25 c. v cm = 0v, pulse tested, 5v v s 12v, v shdnref = 0v, r bias = 24.9k between v + and shdn unless otherwise noted. (note 3) symbol parameter conditions min typ max units v os input offset voltage 15.0 mv l 7.5 mv input offset voltage matching (note 6) 0.3 5.0 mv l 7.5 mv input offset voltage drift l 10 m v/ c i os input offset current 100 500 na l 800 na i b input bias current 0.1 4 m a l 6 m a input bias current matching (note 6) 100 500 na l 800 na e n input noise voltage density f = 10khz 8 nv/ ? hz i n input noise current density f = 10khz 0.8 pa/ ? hz r in input resistance v cm = (v + e 2v) to (v e + 2v) l 550 m w differ ential 6.5 m w c in input capacitance 3pf input voltage range (positive) (note 5) l v + e 2 v + e 1 v input voltage range (negative) (note 5) l v e + 1 v e + 2 v cmrr common mode rejection ratio v cm = (v + e 2v) to (v e + 2v) 74 83 db l 66 db 1 2 3 4 5 6 7 8 9 10 11 12 13 14 top view fe package 28-lead plastic tssop 28 27 26 25 24 23 22 21 20 19 18 17 16 15 v e ein a +in a shdn1 shdnref1 +in b ein b ein c +in c shdn2 shdnref2 +in d ein d v e v e v e out a v + v + out b v e v e out c v + v + out d v e v e a b c d consult ltc marketing for parts specified with wider operating temperature ranges.
3 lt6301 sn6301 6301f symbol parameter conditions min typ max units electrical characteristics the l denotes the specifications which apply over the full specified temperature range, otherwise specifications are at t a = 25 c. v cm = 0v, pulse tested, 5v v s 12v, v shdnref = 0v, r bias = 24.9k between v + and shdn unless otherwise noted. (note 3) psrr power supply rejection ratio v s = 4v to 12v 74 88 db l 66 db a vol large-signal voltage gain v s = 12v, v out = 10v, r l = 40 w 63 76 db l 57 db v s = 5v, v out = 3v, r l = 25 w 60 70 db l 54 db v out output swing v s = 12v, r l = 100 w 10.9 11.1 v l 10.7 v v s = 12v, i l = 250ma 10.6 10.9 v l 10.4 v v s = 5v, r l = 25 w 3.7 4 v l 3.5 v v s = 5v, i l = 250ma 3.6 3.9 v l 3.4 v i out maximum output current v s = 12v, r l = 1 w 500 1200 ma i s supply current per amplifier v s = 12v, r bias = 24.9k (note 7) 8.0 10 13.5 ma l 6.7 15.0 ma v s = 12v, r bias = 32.4k (note 7) 8 ma v s = 12v, r bias = 43.2k (note 7) 6 ma v s = 12v, r bias = 66.5k (note 7) 4 ma v s = 5v, r bias = 24.9k (note 7) 2.2 3.4 5.0 ma l 1.8 5.8 ma supply current in shutdown v shdn = 0.4v 0.1 1 ma output leakage in shutdown v shdn = 0.4v 0.3 1 ma channel separation v s = 12v, v out = 10v, r l = 40 w (note 8) 80 110 db l 77 db sr slew rate v s = 12v, a v = C 10, (note 9) 300 600 v/ m s v s = 5v, a v = C10, (note 9) 100 200 v/ m s hd2 differential 2nd harmonic distortion v s = 12v, a v = 10, 2v p-p , r l = 50 w , 1mhz C 85 dbc hd3 differential 3rd harmonic distortion v s = 12v, a v = 10, 2v p-p , r l = 50 w , 1mhz C 82 dbc gbw gain bandwidth f = 1mhz 200 mhz note 1 : absolute maximum ratings are those values beyond which the life of a device may be impaired. note 2 : applies to short circuits to ground only. a short circuit between the output and either supply may permanently damage the part when operated on supplies greater than 10v. note 3 : the lt6301c is guaranteed to meet specified performance from 0 c to 70 c and is designed, characterized and expected to meet these extended temperature limits, but is not tested at C 40 c and 85 c. the lt6301i is guaranteed to meet the extended temperature limits. note 4 : thermal resistance varies depending upon the amount of pc board metal attached to pins 1, 14, 15, 28 and the exposed bottom side metal of the device. if the maximum dissipation of the package is exceeded, the device will go into thermal shutdown and be protected. note 5 : guaranteed by the cmrr tests. note 6 : matching is between amplifiers a and b or between amplifiers c and d. note 7 : r bias is connected between v + and each shdn pin, with each shdnref pin grounded. note 8 : channel separation is measured between amplifiers a and b and between amplifiers c and d. channel separation between any other combination of amplifiers is guaranteed by design as two separate die are used in the package. note 9 : slew rate is measured at 5v on a 10v output signal while operating on 12v supplies and 1v on a 3v output signal while operating on 5v supplies.
4 lt6301 sn6301 6301f typical perfor a ce characteristics uw supply current vs ambient temperature input common mode range vs supply voltage input bias current vs ambient temperature supply voltage ( v) 2 v common mode range (v) 1.0 2.0 2.0 4 6 810 6301 g02 12 ?.0 v + 0.5 1.5 ?.5 0.5 14 t a = 25 c ? v os > 1mv temperature ( c) ?0 i supply per amplifier (ma) 11 13 15 6301 g01 9 7 10 12 14 8 6 5 ?0 ?0 10 30 50 70 90 v s = 12v r bias = 24.9k to shdn v shdnref = 0v temperature ( c) ?0 i bias (na) 120 160 200 50 6301 g03 80 40 100 140 180 60 20 0 ?0 ?0 10 30 70 90 v s = 12v i s per amplifier = 10ma input noise spectral density output short-circuit current vs ambient temperature output saturation voltage vs ambient temperature frequency (hz) 1 input voltage noise (nv/ hz) input current noise (pa/ hz) 10 1 100 1k 10k 6301 g04 0.1 10 100 1 10 0.1 100 100k e n i n t a = 25 c v s = 12v i s per amplifier = 10ma temperature ( c) ?0 600 i sc (ma) 620 660 680 700 800 740 ?0 30 50 6301 g05 640 760 780 720 ?0 10 70 90 v s = 12v i s per amplifier = 10ma sinking sourcing temperature ( c) ?0 output saturation voltage (v) 0.5 10 6301 g06 1.0 ?0 ?0 30 0.5 v v + ?.0 ?.5 1.5 50 70 90 v s = 12v r l = 100 r l = 100 i load = 250ma i load = 250ma open-loop gain and phase vs frequency C3db bandwidth vs supply current slew rate vs supply current frequency (hz) ?0 gain (db) phase (deg) 100 120 ?0 ?0 80 20 60 40 0 100k 10m 100m 6300 g07 ?0 ?60 80 120 200 240 40 ?0 0 ?0 ?20 280 1m t a = 25 c v s = 12v a v = 10 r l = 100 i s per amplifier = 10ma phase gain supply current per amplifier (ma) 2 0 3db bandwidth (mhz) 5 15 20 25 6 8 10 12 14 45 6301 g08 10 4 30 35 40 t a = 25 c v s = 12v a v = 10 r l = 100 supply current per amplifier (ma) 2 slew rate (v/ s) 600 800 1000 11 12 6301 g09 400 200 500 700 900 300 100 0 345 67 8910 13 14 15 t a = 25 c v s = 12v a v = 10 r l = 1k rising falling
5 lt6301 sn6301 6301f typical perfor a ce characteristics uw cmrr vs frequency psrr vs frequency frequency response vs supply current frequency (mhz) 0.1 40 common mode rejection ratio (db) 50 60 70 80 1 10 100 6301 g10 30 20 10 0 90 100 t a = 25 c v s = 12v i s = 10ma per amplifier frequency (mhz) 30 power supply rejection (db) 90 100 20 10 80 50 70 60 40 0.01 1 10 100 6301 g11 ?0 0 0.1 v s = 12v a v = 10 i s = 10ma per amplifier (? supply (+) supply frequency (hz) 1k 10k 0 gain (db) 5 10 15 20 100k 1m 10m 100m 6301 g12 ? ?0 ?5 ?0 25 30 v s = 12v a v = 10 2ma per amplifier 10ma per amplifier 15ma per amplifier output impedance vs frequency i shdn vs v shdn supply current vs v shdn frequency (mhz) 0.01 0.1 0.01 output impedance ( ) 1 1000 1 10 100 6301 g13 0.1 10 100 t a = 25 c v s 12v i s per amplifier = 2ma i s per amplifier = 10ma i s per amplifier = 15ma v shdn (v) 0 i shdn (ma) 1.5 2.0 2.5 4.0 6301 g14 1.0 0.5 0 1.0 2.0 3.0 5.0 3.5 0.5 1.5 2.5 4.5 t a = 25 c v s = 12v v shdnref = 0v v shdn (v) 0 supply current per amplifier (ma) 15 20 25 30 35 4.0 6301 g15 10 5 0 1.0 2.0 3.0 5.0 3.5 0.5 1.5 2.5 4.5 t a = 25 c v s = 12v v shdnref = 0v differential harmonic distortion vs output amplitude v out(p-p) ?00 distortion (dbc) ?0 ?0 ?0 ?0 4 8 10 12 14 16 18 6301 g16 ?0 02 6 ?0 f = 1mhz t a = 25 c v s = 12v a v = 10 r l = 50 i s per amplifier = 10ma hd3 hd2 differential harmonic distortion vs frequency frequency (khz) distortion (dbc) ?0 ?0 ?0 800 6301 g17 ?0 ?0 ?5 ?5 ?5 ?5 ?5 ?0 200 100 400 300 600 700 900 500 1000 v o = 10v p-p t a = 25 c v s = 12v a v = 10 r l = 50 i s per amplifier = 10ma hd3 hd2
6 lt6301 sn6301 6301f typical perfor a ce characteristics uw differential harmonic distortion vs supply current undistorted output swing vs frequency i supply per amplifier (ma) ?5 distortion (dbc) ?0 ?0 ?5 ?0 78910 ?0 6301 g18 ?5 23456 11 ?5 ?0 ?5 v o = 10v p-p v s = 12v a v = 10 r l = 50 f = 1mhz, hd3 f = 1mhz, hd2 f = 100khz, hd2 f = 100khz, hd3 frequency (hz) 100k 0 output voltage (v p-p ) 5 10 15 20 300k 1m 3m 10m 6301 g19 sfdr > 40db t a = 25 c v s = 12v a v = 10 r l = 50 i s per amplifier = 10ma test circuit 3 or 9 2 or 8 12v 1k 12v 26 or 20 4 (shdn) 10 r bias r bias to pins: 18, 19, 24 and 25 to pins: 1, 14, 15, 16, 21, 22, 27 and 28 110 out (+) out (? 10k e in 0.01 f r l 50 1:2* 10k 49.9 110 12.7 6301 tc 11 23 or 17 5 (shdnref) + a or c 7 or 13 6 or 12 1k 0.1 f 4.7 f 0.1 f 12v ?2v + b or d 12.7 v out(p-p) 100 line load supply bypassing *coilcraft x8390-a or equivalent v outp-p amplitude set at each amplifier output distortion measured across line load for matching, use amplifiers a and b, or amplifiers c and d splitter minicircuits zsc5-2-2 + + 4.7 f + 0.1 f 4.7 f
7 lt6301 sn6301 6301f applicatio s i for atio wu uu the lt6301 is a high speed, 200mhz gain bandwidth product, quad voltage feedback amplifier with high output current drive capability, 500ma source and sink. the lt6301 is ideal for use as a line driver in xdsl data communication applications. the output voltage swing has been optimized to provide sufficient headroom when operating from 12v power supplies in full-rate adsl applications. the lt6301 also allows for an adjustment of the operating current to minimize power consumption. in addition, the lt6301 is available in a small footprint surface mount package to minimize pcb area. to minimize signal distortion, the lt6301 amplifiers are decompensated to provide very high open-loop gain at high frequency. as a result each amplifier is frequency stable with a closed-loop gain of 10 or more. if a closed- loop gain of less than 10 is desired, external frequency compensating components can be used. setting the quiescent operating current power consumption and dissipation are critical concerns in multiport xdsl applications. two pins, shutdown (shdn) and shutdown reference (shdnref), are provided to control quiescent power consumption and allow for the complete shutdown of the drivers. the quiescent current should be set high enough to prevent distortion induced errors in a particular application, but not so high that power is wasted in the driver unnecessarily. a good starting point to evaluate the lt6301 is to set the quiescent current to 10ma per amplifier. pins 4 and 5 set the current for ampli- fiers a and b and pins 10 and 11 set the current for amplifers c and d. each amplifier pair should be controlled separately. the internal biasing circuitry is shown in figure 1. ground- ing the shdnref pin and directly driving the shdn pin with a voltage can control the operating current as seen in the typical performance characteristics. when the shdn pin is less than shdnref + 0.4v, the driver is shut down and consumes typically only 100 m a of supply current and the outputs are in a high impedance state. part to part varia- tions, however, will cause inconsistent control of the qui- escent current if direct voltage drive of the shdn pin is used. using an external resistor, r bias , connected in one of two ways provides a much more predictable control of the quiescent supply current. figure 2 illustrates the effect on supply current per amplifier with r bias connected be- tween the shdn pin and the 12v v + supply of the lt6301 and the approximate design equations. figure 3 illustrates the same control with r bias connected between the shdnref pin and ground while the shdn pin is tied to v + . either approach is equally effective. figure 1. internal current biasing circuitry 2k shdn shdnref to start-up circuitry 1k 6301 f01 i bias to amplifiers bias circuitry 2i i 2i 5i 2 5 i bias = i supply per amplifier (ma) = 64 ?i bias i shdn = i shdnref r bias (k ) 0 i supply per amplifier (ma) 10 20 30 5 15 25 10 6301 f02 7 40 70 100 130 160 190 v s = 12v v + = 12v r bias shdn shdnref r bias = ?25.6 ?2k v + ?1.2v i s per amplifier (ma) i s per amplifier (ma) ?25.6 v + ?1.2v r bias + 2k figure 2. r bias to v + current control
8 lt6301 sn6301 6301f logic controlled operating current the dsp controller in a typical xdsl application can have i/o pins assigned to provide logic control of the lt6301 line driver operating current. as shown in figure 4 one or two logic control inputs can control two or four different operating modes. the logic inputs add or subtract current to the shdn input to set the operating current. the one logic input example selects the supply current to be either full power, 10ma per amplifier or just 2ma per amplifier, which significantly reduces the driver power consumption applicatio s i for atio wu uu r bias (k ) 4 7 10 50 90 130 170 210 250 30 70 100 150 190 230 270 290 i supply per amplifier (ma) 20 25 30 35 40 6301 f03 5 10 15 0 45 v s = 12v v + = 12v r bias shdn shdnref r bias = ?64 ?5k v + ?1.2v i s per amplifier (ma) i s per amplifier (ma) ?64 v + ?1.2v r bias + 5k figure 3. r bias to ground current control while maintaining less than 2 w output impedance to frequencies less than 1mhz. this low power mode retains termination impedance at the amplifier outputs and the line driving back termination resistors. with this termina- tion, while a dsl port is not transmitting data, it can still sense a received signal from the line across the back- termination resistors and respond accordingly. the two logic input control provides two intermediate (approximately 7ma per amplifier and 5ma per amplifier) operating levels between full power and termination modes. two control inputs resistor values (k ) r shdn to v cc (12v) r shdn to v logic v logic r shdn r c1 r co 3v 40.2 11.5 19.1 3.3v 43.2 13.0 22.1 5v 60.4 21.5 36.5 3v 4.99 8.66 14.3 3.3v 6.81 10.7 17.8 5v 19.6 20.5 34.0 v c0 h l h l v c1 h h l l 10 7 5 2 10 7 5 2 10 7 5 2 10 7 5 2 10 7 5 2 10 7 5 2 supply current per amplifier (ma) one control input resistor values (k ) r shdn to v cc (12v) r shdn to v logic v logic r shdn r c 3v 40.2 7.32 3.3v 43.2 8.25 5v 60.4 13.7 3v 4.99 5.49 3.3v 6.81 6.65 5v 19.6 12.7 v c h l 10 2 10 2 10 2 10 2 10 2 10 2 supply current per amplifier (ma) r shdn r c1 v c1 v logic 12v or v logic 0v v c0 r c0 shdn shdnref 2k r shdn r c v c v logic 12v or v logic 0v shdn shdnref 6301 f04 2k figure 4. providing logic input control of operating current
9 lt6301 sn6301 6301f applicatio s i for atio wu uu these modes can be useful for overall system power management when full power transmissions are not nec- essary. contact ltc applications for single supply design information. shutdown and recovery the ultimate power saving action on a completely idle port is to fully shut down the line driver by pulling the shdn pin to within 0.4v of the shdnref potential. as shown in figure 5 complete shutdown occurs in less than 10 m s and, more importantly, complete recovery from the shut down state to full operation occurs in less than 2 m s. the biasing circuitry in the lt6301 reacts very quickly to bring the amplifiers back to normal operation. power dissipation and heat management xdsl applications require the line driver to dissipate a significant amount of power and heat compared to other components in the system. the large peak to rms varia- tions of dmt and cap adsl signals require high supply voltages to prevent clipping, and the use of a step-up transformer to couple the signal to the telephone line can require high peak current levels. these requirements result in the driver package having to dissipate significant amounts of power. several multiport cards inserted into a rack in an enclosed central office box can add up to many, many watts of power dissipation in an elevated ambient temperature environment. the lt6301 has built- in thermal shutdown cir cuitry that will protect the ampli- fiers if operated at excessive temperatures, however data transmissions will be seriously impaired. it is important in the design of the pcb and card enclosure to take measures to spread the heat developed in the driver away to the ambient environment to prevent thermal shutdown (which occurs when the junction temperature of the lt6301 exceeds 165 c). estimating line driver power dissipation figure 6 is a typical adsl application shown for the purpose of estimating the power dissipation in the line driver. due to the complex nature of the dmt signal, v shdn shdnref = 0v amplifier output 6301 f05 figure 5. shutdown and recovery timing figure 6. estimating line driver power dissipation 6301 f06 + b ?n + a +in 12v 20ma dc shdn 12v ?v rms 17.4 24.9k ?sets i q per amplifier = 10ma 1:1.7 110 1000pf 110 1k 1k 17.4 shdnref 100 3.16v rms i load = 57ma rms 2v rms
10 lt6301 sn6301 6301f which looks very much like noise, it is easiest to use the rms values of voltages and currents for estimating the driver power dissipation. the voltage and current levels shown for this example are for a full-rate adsl signal driving 20dbm or 100mw rms of power on to the 100 w telephone line and assuming a 0.5dbm insertion loss in the transformer. the quiescent current for the lt6301 is set to 10ma per amplifier. the power dissipated in the lt6301 is a combination of the quiescent power and the output stage power when driving a signal. the two pairs of amplifiers are configured to place a differential signal on two lines. the class ab output stage in each amplifier will simultaneously dissipate power in the upper power transistor of one amplifier, while sourc- ing current, and the lower power transistor of the other amplifier, while sinking current. the total device power dissipation is then: p d = p quiescent + p q(upper) + p q(lower) p d = (v + C v C ) ? i q + (v + C v outarms ) ? i load + (v C C v outbrms ) ? i load with no signal being placed on the line and the amplifier biased for 10ma per amplifier supply current, the quies- cent driver power dissipation is: p dq = [24v ? 10ma] ? 4 = 960mw this can be reduced in many applications by operating with a lower quiescent current value or shutting down the part during idle conditions. when driving a load, a large percentage of the amplifier quiescent current is diverted to the output stage and becomes part of the load current. figure 7 illustrates the total amount of biasing current flowing between the + and C power supplies through the amplifiers as a function of load current for one differential driver. as much as 60% of the quiescent no load operating current is diverted to the load. at full power to both lines the total package power dissi- pation is: p d(full) = [ 24v ? 8ma + (12v C 2v rms ) ? 57ma rms + [|C12v C (C 2v rms )|] ? 57ma rms ] ? 2 p d(full) = [192mw + 570mw + 570mw] ? 2 = 2.664w* the junction temperature of the driver must be kept less than the thermal shutdown temperature when processing a signal. the junction temperature is determined from the following expression: t j = t ambient ( c) + p d(full) (w) ? q ja ( c/w) q ja is the thermal resistance from the junction of the lt6301 to the ambient air, which can be minimized by heat-spreading pcb metal and airflow through the enclo- sure as required. for the example given, assuming a maximum ambient temperature of 50 c and keeping the junction temperature of the lt6301 to 150 c maximum, the maximum thermal resistance from junction to ambient required is: q ja max cc w cw () . ./ = = 150 50 2 664 37 5 applicatio s i for atio wu uu figure 7. i q vs i load i load (ma) (one differential driver) 240 200 160 ?20 80 40 0 40 80 120 160 200 240 total i q (ma) 10 15 20 6301 f07 5 0 25 *design techniques exist to significantly reduce this value (see line driving back termination).
11 lt6301 sn6301 6301f applicatio s i for atio wu uu heat sinking using pcb metal designing a thermal management system is often a trial and error process as it is never certain how effective it is until it is manufactured and evaluated. as a general rule, the more copper area of a pcb used for spreading heat away from the driver package, the more the operating junction temperature of the driver will be reduced. the limit to this approach however is the need for very com- pact circuit layout to allow more ports to be implemented on any given size pcb. to best extract heat from the fe28 package, a generous area of top layer pcb metal should be connected to the four corner pins (pins 1, 14, 15 and 28). these pins are fused to the leadframe where the lt6301 die are attached. the package also has an exposed metal heat sinking pad on the bottom side which, when soldered to the pcb top layer metal, directly conducts heat away from the ic junction. soldering the thermal pad to the board produces a thermal resistance from junction to case, q jc , of approximately 3 c/w. important note: the metal planes used for heat sinking the lt6301 are electrically connected to the negative supply potential of the driver, typically e12v. these planes must be isolated from any other power planes used in the board design. fortunately xdsl circuit boards use multiple layers of metal for interconnection of components. areas of metal beneath the lt6301 connected together through several small 13 mil vias can be effective in conducting heat away from the driver package. the use of inner layer metal can free up top and bottom layer pcb area for external compo- nent placement. when pcb cards containing multiple ports are inserted into a rack in an enclosed cabinet, it is often necessary to provide airflow through the cabinet and over the cards. this is also very effective in reducing the junction-to- ambient thermal resistance of each line driver. to a limit, this thermal resistance can be reduced approximately 5 c/w for every 100lfpm of laminar airflow. layout and passive components with a gain bandwidth product of 200mhz the lt6301 requires attention to detail in order to extract maximum performance. use a ground plane, short lead lengths and a combination of rf-quality supply bypass capacitors (i.e., 0.1 m f). as the primary applications have high drive cur- rent, use low esr supply bypass capacitors (1 m f to 10 m f). the four v + pins (pins 18, 19, 24, 25) separately provide power to each amplifier and should be shorted together with leads as short as possible to the bypass capacitors. the parallel combination of the feedback resistor and gain setting resistor on the inverting input can combine with the input capacitance to form a pole that can cause frequency peaking. in general, use feedback resistors of 1k or less. compensation the lt6301 is stable in a gain 10 or higher for any supply and resistive load. it is easily compensated for lower gains with a single resistor or a resistor plus a capacitor. figure 8 shows that for inverting gains, a resistor from the inverting node to ac ground guarantees stability if the parallel combination of r c and r g is less than or equal to r f /9. for lowest distortion and dc output offset, a series capacitor, c c , can be used to reduce the noise gain at lower frequencies. the break frequency produced by r c and c c should be less than 5mhz to minimize peaking. figure 9 shows compensation in the noninverting configu- ration. the r c , c c network acts similarly to the inverting case. the input impedance is not reduced because the network is bootstrapped. this network can also be placed between the inverting input and an ac ground. figure 8. compensation for inverting gains r g r c v o v i c c (optional) e + 6301 f08 r f = er f r g v o v i < 5mhz 1 21r c c c (r c || r g ) 2 r f /9
12 lt6301 sn6301 6301f applicatio s i for atio wu uu another compensation scheme for noninverting circuits is shown in figure 10. the circuit is unity gain at low fre- quency and a gain of 1 + r f /r g at high frequency. the dc output offset is reduced by a factor of ten. the techniques of figures 9 and 10 can be combined as shown in fig- ure 11. the gain is unity at low frequencies, 1 + r f /r g at mid-band and for stability, a gain of 10 or greater at high frequencies. in differential driver applications, as shown on the first page of this data sheet, it is recommended that the gain setting resistor be comprised of two equal value resistors connected to a good ac ground at high frequencies. this ensures that the feedback factor of each amplifier remains less than 0.1 at any frequency. the midpoint of the resistors can be directly connected to ground, with the resulting dc gain to the v os of the amplifiers, or just bypassed to ground with a 1000pf or larger capacitor. line driving back-termination the standard method of cable or line back-termination is shown in figure 12. the cable/line is terminated in its characteristic impedance (50 w , 75 w , 100 w , 135 w , etc.). a back-termination resistor also equal to the chararacteristic impedance should be used for maximum pulse fidelity of outgoing signals, and to terminate the line for incoming signals in a full-duplex application. there are three main drawbacks to this approach. first, the power dissipated in the load and back-termination resistors is equal so half of the power delivered by the amplifier is wasted in the termination resistor. second, the signal is halved so the gain of the amplifer must be doubled to have the same overall gain to the load. the increase in gain increases noise and decreases bandwidth (which can also increase distortion). third, the output swing of the amplifier is doubled which can limit the power it can deliver to the load for a given power supply voltage. an alternate method of back-termination is shown in figure 13. positive feedback increases the effective back- termination resistance so r bt can be reduced by a factor figure 10. alternate noninverting compensation figure 11. combination compensation figure 12. standard cable/line back termination figure 9. compensation for noninverting gains r c v o v i c c (optional) + e 6301 f09 r f r g = 1 + r f r g v o v i < 5mhz 1 21r c c c (r c || r g ) 2 r f /9 + e 6301 f10 r f r g v i v o c c < 5mhz 1 21r g c c r g 2 r f /9 = 1 (low frequencies) (high frequencies) v o v i = 1 + r f r g r c v o v i c c + e 6301 f11 r f r g c big r f r g = 1 at low frequencies = 1 + at medium frequencies r f (r c || r g ) = 1 + at high frequencies v o v i + e 6301 f12 r f r bt cable or line with characteristic impedance r l r g v o v i r l (1 + r f /r g ) = v o v i 1 2 r bt = r l
13 lt6301 sn6301 6301f of n. to analyze this circuit, first ground the input. as r bt = r l /n, and assuming r p2 >>r l we require that: v a = v o (1 e 1/n) to increase the effective value of r bt by n. v p = v o (1 e 1/n)/(1 + r f /r g ) v o = v p (1 + r p2 /r p1 ) eliminating v p , we get the following: (1 + r p2 /r p1 ) = (1 + r f /r g )/(1 e 1/n) for example, reducing r bt by a factor of n = 4, and with an amplifer gain of (1 + r f /r g ) = 10 requires that r p2 /r p1 = 12.3. note that the overall gain is increased: v v rrr nrrrrr o i ppp fg p p p = + () + () + () [] -+ () [] 221 12 1 11 1 / // / / a simpler method of using positive feedback to reduce the back-termination is shown in figure 14. in this case, the drivers are driven differentially and provide complemen- tary outputs. grounding the inputs, we see there is invert- ing gain of er f /r p from ev o to v a v a = v o (r f /r p ) and assuming r p >> r l , we require v a = v o (1 e 1/n) solving r f /r p = 1 e 1/n so to reduce the back-termination by a factor of 3 choose r f /r p = 2/3. note that the overall gain is increased to: v o /v i = (1 + r f /r g + r f /r p )/[2(1 e r f /r p )] using positive feedback is often referred to as active termination. figure 16 shows a full-rate adsl line driver incorporating positive feedback to reduce the power lost in the back termination resistors by 40% yet still maintains the proper impedance match to the100 w characteristic line imped- ance. this circuit also reduces the transformer turns ratio over the standard line driving approach resulting in lower peak current requirements. with lower current and less power loss in the back termination resistors, this driver dissipates only 1w of power, a 30% reduction. while the power savings of positive feedback are attractive there is one important system consideration to be ad- dressed, received signal sensitivity. the signal received applicatio s i for atio wu uu figure 14. back termination using differential postive feedback figure 13. back termination using postive feedback + e 6301 f13 r f r bt r p2 r p1 r g v i v a v p v o r l r f r g 1 + r l n = v o v i = 1 e e 1 n for r bt = () r f r g 1 + () r p1 r p1 + r p2 r p1 r p2 + r p1 r p2 /(r p2 + r p1 ) () 1 + 1/n e + r bt r f r g r p r p r g r l r l ev i v a ev a v i ev o v o e + r bt 6301 f14 r f r l n = v o v i n = 1 e2 for r bt = r f r p r f r p + r f r g 1 + 1 e r f r p 1 ()
14 lt6301 sn6301 6301f applicatio s i for atio wu uu from the line is sensed across the back termination resis- tors. with positive feedback, signals are present on both ends of the r bt resistors, reducing the sensed amplitude. extra gain may be required in the receive channel to compensate, or a completely separate receive path may be implemented through a separate line coupling transformer. considerations for fault protection the basic line driver design, shown on the front page of this data sheet, presents a direct dc path between the outputs of the two amplifiers. an imbalance in the dc biasing potentials at the noninverting inputs through either a fault condition or during turn-on of the system can create a dc voltage differential between the two amplifier outputs. this condition can force a considerable amount of current to flow as it is limited only by the small valued back-termination resistors and the dc resistance of the transformer primary. this high current can possibly cause the power supply voltage source to drop significantly impacting overall system performance. if left unchecked, the high dc current can heat the lt6301 to thermal shutdown. using dc blocking capacitors, as shown in figure 15, to ac couple the signal to the transformer eliminates the possibility for dc current to flow under any conditions. these capacitors should be sized large enough to not impair the frequency response characteristics required for the data transmission. another important fault related concern has to do with very fast high voltage transients appearing on the tele- phone line (lightning strikes for example). transzorbs ? , varistors and other transient protection devices are often used to absorb the transient energy, but in doing so also create fast voltage transitions themselves that can be coupled through the transformer to the outputs of the line driver. several hundred volt transient signals can appear at the primary windings of the transformer with current into the driver outputs limited only by the back termination resistors. while the lt6301 has clamps to the supply rails at the output pins, they may not be large enough to handle the significant transient energy. external clamping diodes, such as bav99s, at each end of the transformer primary help to shunt this destructive transient energy away from the amplifier outputs. transzorb is a registered trademark of general instruments, gsi figure 15. protecting the driver against load faults and line transients 6301 f15 + 1/4 lt6301 ?n + 1/4 lt6301 +in 12v shdn 12v 12.7 0.1 f 12v 12v 24.9k 1:2 line load 110 1000pf 110 1k 1k 12.7 shdnref 0.1 f 12v 12v bav99 bav99
15 lt6301 sn6301 6301f u package descriptio si plified sche atic ww (one amplifier shown) information furnished by linear technology corporation is believed to be accurate and reliable. however, no responsibility is assumed for its use. linear technology corporation makes no represen- tation that the interconnection of its circuits as described herein will not infringe on existing patent rights. ?n v + q1 q5 r1 v +in out q2 q3 q12 q4 q7 q8 q6 q16 q17 q15 q14 q9 c2 c1 q13 q18 6301 ss q10 q11 fe package 28-lead plastic tssop (4.4mm) (reference ltc dwg # 05-08-1663) exposed pad variation ea fe28 (ea) tssop 0203 0.09 ?0.20 (.0036 ?.0079) 0 ?8 0.45 ?0.75 (.018 ?.030) 4.30 ?4.50* (.169 ?.177) 6.40 bsc 134 5 6 7 8910 11 12 13 14 19 20 22 21 15 16 18 17 9.60 ?9.80* (.378 ?.386) 7.56 (.298) 3.05 (.120) 28 2726 25 24 23 1.20 (.047) max 0.05 ?0.15 (.002 ?.006) 0.65 (.0256) bsc 0.195 ?0.30 (.0077 ?.0118) 2 recommended solder pad layout exposed pad heat sink on bottom of package 0.45 0.05 0.65 bsc 4.50 0.10 6.60 0.10 1.05 0.10 7.56 (.298) 3.05 (.120) millimeters (inches) *dimensions do not include mold flash. mold flash shall not exceed 0.150mm (.006") per side note: 1. controlling dimension: millimeters 2. dimensions are in 3. drawing not to scale see note 4 4. recommended minimum pcb metal size for exposed pad attachment
16 lt6301 sn6301 6301f ? linear technology corporation 2001 lt/tp 0303 2k printed in the usa part number description comments lt1361 dual 50mhz, 800v/ m s op amp 15v operation, 1mv v os , 1 m a i b LT1739 dual 500ma, 200mhz xdsl line driver low cost adsl co driver, low power lt1794 dual 500ma, 200mhz xdsl line driver adsl co driver, extended output swing, low power lt1795 dual 500ma, 50mhz current feedback amplifier shutdown/current set function, adsl co driver lt1813 dual 100mhz, 750v/ m s, 8nv/ ? hz op amp low noise, low power differential receiver, 4ma/amplifier lt1886 dual 200ma, 700mhz op amp 12v operation, 7ma/amplifier, adsl cpe modem line driver lt1969 dual 200ma, 700mhz op amp with power control 12v operation, msop package, adsl cpe modem line driver lt6300 dual 500ma, 200mhz, xdsl line driver adsl co driver in ssop package related parts linear technology corporation 1630 mccarthy blvd., milpitas, ca 95035-7417 (408) 432-1900 l fax: (408) 434-0507 l www.linear.com figure 16. adsl line driver using active termination u typical applicatio 6301 f16 + C 1/4 lt6301 Cin C + 1/4 lt6301 +in 12v shdn C12v 13.7 24.9k 1:1.2* 182 1000pf 182 1k 1.65k 1.65k 1k 13.7 shdnref 100 line *coilcraft x8502-a or equivalent 1w driver power dissipation 1.15w power consumption ? ?

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